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Cisco pattern
Cisco pattern
CISCO SYSTEMS Interview Procedure : The written test is followed by a lengthy technical interview. The interview may last up to 1 hour or more. It is entirely technical with questions on all basic fundamentals. The written test consists of three sections based on the MCQ pattern. Each section has 30 questions. There is a choice between Section 2 and Section 3 and only one has to be done. Section 1 is based on basic digital electronics. Section 2 is software oriented Section 3 is advanced digital electronics with questions on setup, hold time, clock violation etc |
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suresh_m1729@yahoo.co.in (29-07-08)
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Super Moderator
Join Date: Feb 2006
Age: 25
Posts: 4,551
Thanks: 25 Thanked 347 Times in 219 Posts Thanks: 25
Thanked 347 Times in 219 Posts
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Cisco placement paper 4
Cisco placement paper 4
1.On cmos power( formula- P=CV*Vf 2.Lowest noise margin in which logic family-- a) TTL b) CMOS c) biCMOS d) all have same 3.If CMOS has tr(rise time)=tf.find Wp/Wn. given beta(n)=2*beta(p) 4.gm of a transistor is proportional to a)Ic b)Vt c)1/Vt d)none 5.If A and B are given in 2's complement find A-B in decimal. 6.Set up time,hold time ,clock to Q delay time (very important) 7.3 questions on opamp (transfer function)(2 marks each) 8.2 questions on sequence detector (2 marks each) 9.Logic function boolean expressions(true/false) (3 question-1 mark each)probabily all false 10.In I/O mapped how do you represent memory(1 mark) 11.The design of FSM(finite state machine) will-- a) increase time of design b) increase delay c) increase power d) all of the above 12.K-map minimization 13.Phase locked loop(PLL) 1 question sachin |
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