Atrenta (India) Pvt. Ltd. hiring Lead/Sr. Applications Engineer

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Atrenta (India) Pvt. Ltd. is a 100 % owned subsidiary of Atrenta Inc. USA. Atrenta India was formed in May 2001 and operates from its development center in Noida & Bangalore. It is led by an experienced and technically skilled management team and currently employs more than 215 professionals from premier technical institutes in India.

Atrenta Inc. has more than 100 global customers, which include 10 of the top 10 semiconductor companies and more than 27 of the top 30 chip companies.

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Our Technology
Atrenta pioneered the RTL analysis with its SpyGlass tool and rapidly evolved SpyGlass into 2nd and 3rd generation tools. With Atrenta solution, design development is transformed into a continuous realization of design closure jumpstarted at RTL phase. With Atrenta impact, RTL handoff achieves multi-dimensional goals'the traditional functional correctness as well as RTL readiness for synthesizability, testability, timing etc. Atrenta SpyGlass and 1Team solutions take the uncertainty and chance out of electronic product creation, enabling customers to build better products, more quickly and economically than ever before.

Designation Lead/Sr. Applications Engineer

Job Description Position Responsibility:Application Engineer, will act as a bridge between Atrenta Customers and Atrenta development team globally. In the field, you will support Pre/Post sales activities like Evaluation, Deployment, Proliferation, Customer Training for various SpyGlass products on the highly evolved and technologically advanced SOC designs. You will also be responsible for the improvements of the customer''s existing design flows & methodologies by appropriately suggesting the SpyGlass features in the areas like Clock Domain Crossing, DFT, STA, Verification and Synthesis such that their design time can be dramatically reduced.'
On the parallel track, you will continuously be feeding the development team with valuable field inputs for the further enhancements and enrichments in the product''s feature set & performance.

Desired Profile Skills required: Familiarity with ASIC design flow and the EDA tools and methodologies used therein.
- In-depth knowledge of Verilog /VHDL semantics from simulation and synthesis perspectives.
- Knowledge of EDA tools in ASIC design domain like Synthesis, STA, and DFT etc.
- Knowledge of Perl / Scripting/ Tcl and programming concepts in C/C++ will be a plus
- Good communication skills and team player.
- Must be flexible, resourceful and responsible to complete assigned tasks within limited resources. Academic Qualification:
B.E / B.Tech/ M.Tech / M.Sc in Computer Science/ Electrical / Electronics Engineering from reputed Universities preferably IIT's, REC''s.
Experience:
The candidate should have 2-5 years of relevant experienceBenefits:
- Opportunity to closely work with leading global semiconductor design houses on their latest designs/methodologies
- Global work area requiring cross geography/cross culture interaction
- Flexible working environment by equipping latest tool of communications like LapTop with Broadband connection at home etc
- Pay Package: Best in the industry

Experience : 2 - 5 Years
Industry Type : Semiconductors/ Electronics
Functional Area : Embedded/EDA /VLSI/ASIC/Chip Design
Education : UG - B.Tech/B.E. - Any Specialization, Computers, Electrical, Electronics/Telecomunication
PG - Any PG Course - Any Specialization
Location : Noida
Keywords : Verilog, VHDL, ASIC, Digital design, STA, Synthesis, Deployment, Clock

Contact : Team HR
Atrenta India Pvt Ltd
A-9,
Sec. 4,
Noida - UP ,India 201301
Telephone : 91-120-4323312
Website : :: Atrenta Inc. :: Early Design Closure